
News
Content for the HPC community and innovation enthusiasts: tutorials, news and press releases for users, engineers and administrators
- All News
- Aerospace & Defence
- Artificial Intelligence
- Blog
- Cloud Platform
- Cloud Platform
- Collaborazioni
- E4 Various
- European Projects
- HPC
- Kubernetes Cluster
- Latest news
- Press
E4 announces breakthrough innovative technologies spanning silicon, software and power management tools, integrated in the RISC-V based “Monte Cimone” cluster

News highlights
- E4 Computer Engineering, a leading System Integrator and Technology Provider, joins forces with Università di Bologna and CINECA to build the first operational RISC-V based cluster targeted to the codesign of HPC applications on RISC-V architecture
- Introducing Monte Cimone, a 6-node cluster integrating RISC-V processors, system software, power management tools
- A set of HPC software tools and representative applications has been ported, tested, and validated. Monte Cimone also supports instrumentation and monitoring plug-ins which enable its integration into existing HPC operations and management cockpits.
E4 Computer Engineering builds on 20+ years of developing and integrating innovative technologies and announces Monte Cimone, a cluster aimed at enabling on RISC-V ISA the co-design of high performance scientific and engineering applications and the supporting software stack.
DEI-UNIBO, the Electric, Electronic and Information Engineering “Guglielmo Marconi” department of the Università di Bologna, has contributed to Monte Cimone’s system architecture definition, software stack development and integration within the Examon data-center automation environment.
CINECA, the leading italian supercomputing center, has ported high-performance mathematical libraries (OpenBLAS, FFTW, Netlib-LAPACK, Netlib-scaLAPACK) and scientific applications (HPL, Quantum Espresso) against the RISC-V ISA supporting E4 and Università di Bologna in the validation of the components of the cluster in the operational environment.
Monte Cimone is currently undergoing the final validation tests at DEI-UNIBO and a similar architecture, albeit at a smaller scale, is located at E4’s R&D lab for further developments.
Once fully validated at DEI-UNIBO and at E4, Monte Cimone will be relocated at CINECA for further testing and for its integration in CINECA’s exascale-class compute environment.
Monte Cimone is the first RISC-V ISA cluster specifically designed, built, and validated for co-design activities targeted to enable its use in the HPC ecosystem and having an operational environment as the primary target. Monte Cimone enables developers to test and validate scientific and engineering workloads in a rich software stack, including development tools, libraries for message-passing programming, BLAS, FFT, drivers for HS networks and I/O devices. The objective is to achieve a future-ready position capable of addressing and leveraging the features of the RISC-V ISA for scientific and engineering applications and workloads in an operational environment. The continuous dialogue between E4, DEI-UNIBO and CINECA enabled Monte Cimone to achieve such a level of stability and reliability, both in term of HW and SW, to run various workflows (e.g. Quantum Espresso) and enabling further applications to be ported.
The key hardware components of Monte Cimone are:
- 6 dual-board servers, with a form factor of 4.44 cm (1 Rack Unit) high, 42.5 cm width, 40 cm deep. Each board follows the Industry Standard Mini-ITX form factor (170 mm per 170 mm);
- Each board features one SiFive Freedom U740 SoC, 16 GB of 64-bit DDR memory operating at 1866s MT/s and high-speed interconnects with PCIe Gen 3 x8 operating at 7.8 GB/s, one Gigabit Ethernet, and four USB 3.2 Gen 1;
- In RV007 system the M.2 M-key expansion slot is occupied by a 1 TB NVME2280 SSD Module storage device used by the Operating System. The Micro SD card is present and used for the UEFI Boot;
- Two 250 W power supplies are integrated inside the case to support the current hardware and future PCIe accelerators and expansion boards;
- Integrated fans
The following picture shows the Monte Cimone Cluster:

The mother board of Monte Cimone is shown in the following picture:

The top, front and rear views of the node of Monte Cimone are depicted in the following pictures:


RISC-V is a very promising ISA for HPC. The European Processor Initiative will use a RISC-V based accelerator. An intense development effort is taking place these days to gauge the maturity of the current generation of RISC-V based processors with the most intense HPC workload. Prof. Luca Benini (DEI-UNIBO), a key member of the EPI consortium and a driving force behind the development of RISC-V, proposed E4 and CINECA to begin a development process that would eventually become Monte Cimone.
Monte Cimone will be used as a platform for porting and tuning HPC-relevant software stacks and HPC applications to the RISC-V architecture. The hardware will be further extended by adding PCEe acceleration cards to explore heterogeneous architectures and based on RISC-V. Complementing the rich set of HW components, the porting of the Infiniband stack is ongoing and will be added to the current configuration as soon as validated. The modularity of the cluster architecture will enable its extensions with new blades hosting higher performance RISC-V processors, memories and storage components as they will become available on the market.
Monte Cimone has an elevation of 2,165 m and is the highest point in the Emilia-Romagna region of Italy, where E4, Università di Bologna and CINECA are located. It is a winter ski resort frequented by snowboarders as it hosts a large snowpark.
Cosimo Gianfreda, CTO of E4 Computer Engineering: “Over the years, E4 has pursued the strategy to be at the leading edge of innovative technology. Our products have been designed considering the requirements of the end users and with the goal to make these systems user-friendly while providing top performance at the lowest TCO. Monte Cimone represents a key opportunity for co-designing and developing innovative RISC-V based technologies and is a significant leap in proposing high-tech and energy energy-efficient solutions.”
“I am extremely excited by the results we achieved with Monte Cimone, which demonstrate remarkable maturity of the RISC-V software stack and tools for HPC. I believe that RISC-V based HPC machines are not far, and Monte Cimone will be instrumental to get there faster”, says Prof. Luca Benini, Full professor of Electronics at DEI-UNIBO and Chair of Digital Circuits and Systems at ETH Zurich.
Dr. Daniele Cesarini, HPC Specialist at CINECA: “As a supercomputing center, we are very interested in the RISC-V technology to support the scientific community. We are excited to contribute to the RISC-V ecosystem supporting the installation and tuning of widely-used scientific codes and mathematical libraries to push forward the development of high-performance RISC-V CPUs. We believe that Monte CIMONE will be the harbinger of the next generation of supercomputers based on RISC-V technology and we will continue to work in synergy with E4 Computer Engineering and the Università di Bologna to prove that RISC-V is ready to stay on the shoulder of the HPC giants.”
Media Contact for E4 Computer Engineering
Agnese Reina
marketing@e4company.com
E4 Computer Engineering
E4 Computer Engineering creates and supplies hardware and software solutions for High Performance Computing, Cloud Computing (Private and Hybrid), containerization, High Performance Data Analytics, Artificial Intelligence, Deep Learning and Virtualization. The growth of recent years has led the company to complete its offer with the inclusion of various open-source technologies such as OpenStack, Kubernetes, and tools for the implementation of a CI / CD toolchain.
Media contact for CINECA
p.coluccia@cineca.it
CINECA
Cineca, established in 1969, is a non-profit consortium of 70 Italian Universities, 9 national
research institution, and the Ministry of University and Research (MUR). Cineca is the largest Italian supercomputing center with an HPC environment equipped with cutting-edge technology and highly-qualified personnel which cooperates with researchers in the use of the HPC infrastructure, in both the academic and industrial fields. Cineca’s mission is to enable the Italian and European research community to accelerate the scientific discovery using HPC resources in a profitable way, exploiting the newest technological advances in HPC, data management, storage systems, tools, services and expertise at large.
Media contact for UNIBO-DEI
UNIBO-DEI
Università di Bologna (UNIBO) is the oldest university in the western world and the top-ranked generalist university in Italy (QS World University Rankings 2022). DEI, the Electric, Electronic and Information Engineering “Guglielmo Marconi” department is top-three ranked in Italy (subject: Electrical Engineering). DEI has collaborated for more than a decade with E4 and CINECA to the co-development of energy-efficient supercomputers. DEI researchers have developed Examon, a state-of the art tool for holistic management of HPC systems and have contributed to the RISC-V open ecosystem since its inception.