Participation in major European Projects of the High Performance Computing and Artificial Intelligence worlds forms a fundamental part of our strategy. These projects bring valuable human resources and expertise, and give us access to a network of important national and international institutions and companies, with which we can co-design and co-develop highly innovative solutions to be later replicated on the market.
The main entity financing and sustaining a large part of these projects is the European High Performance Computing Joint Undertaking (EuroHPC JU), headquartered in Luxemburg. EuroHPC JU coordinates the efforts and manages the resources of various European Countries with the aim of making Europe the world leader in Supercomputing.
E4 is currently involved with 15 projects supported by the EuroHPC JU.
The main objective of the ADMIRE project is to establish a control mechanism by creating an active I/O stack that dynamically adjusts computation and storage requirements through intelligent global coordination, malleability of computation and I/O, and scheduling of storage resources along all levels of the storage hierarchy. To achieve this, the project will develop a software-defined framework based on the principles of scalable monitoring and control, separated control and data paths, and the orchestration of key system components and applications through embedded control points.
E4’s role is to develop Software Heritage (SH) applications and tests, distribute and profile SH, and provide ADMIRE’s partners with access to the ARMIDA Cluster.
Random Power exploits the quantum properties of semiconductors to generate a virtually endless stream of random bits feeding cyber-security systems. In ATTRACT phase 1, the consortium, formed of two research centres and two companies, designed, produced, commissioned, and fully qualified a small form factor card with an embedded bit generator. Now, the consortium includes RaP!, a spin-off of original partners, and has been expanded to integrate teams with complimentary knowledge and expertise from other ATTRACT projects and beyond, with the aim of developing a True Random Bit Generator platform.
E4’s role is to develop and implement a Randomness Farm, based on hardware that incorporates multiple generators into the infrastructure, with a scalable architecture. The hardware is complemented with customized software development to guarantee safe transmission of the bitstream, advanced functionality in real time and a suite of services to maximise the adoption of the technology.
The project will develop an open and portable cloud management framework for automatic and adaptive optimization of applications by mapping jobs to the most suitable resources in a heterogeneous system landscape. By utilizing holistic monitoring, DECICE aims to construct a digital twin of the system that reflects on the original system. An AI-scheduler makes decisions on placement of job and data as well as conducting job rescheduling to adjust to system changes. A virtual training environment is provided that generates test data for training of ML-models and the exploration of what-if scenarios. The portable framework is integrated into the Kubernetes ecosystem and validated using relevant use cases on real-world heterogeneous systems.
E4’s role is to integrate testing task and lead the Work Package on deployment, validation and performance assessment.
DYNAMOS develops fast (1 ns) and widely tunable (>110 nm) lasers, energy-efficient (~ fJ/bit), broadband (100 GHz) electro-optic modulators, and high-speed (1 ns) broadcast-and-select packet switches as photonic integrated circuits (PICs). DYNAMOS meets the expected outcome objectives and call scope by proposing the development of low energy (few pJ/bit) PICs, which are integrated into modular and scalable subsystems, and subsequently utilized to demonstrate novel data centre networks with highly deterministic sub-microsecond latency to enable maximum congestion reduction, full bisection bandwidth (lower congestion) and guaranteed quality of service while reducing cost per Gbps.
The proposed network offers optical circuit switched reconfiguration and guaranteed (contentionless) full-bisection bandwidth, allowing any computational node to communicate to any other node at full-capacity. DYNAMOS co-develops the entire ecosystem of transceivers, switches and networks to boost overall performance and to reducing the total cost of data exchange, instead of focusing on the improvement of individual optical links or interfaces.
E4 is the “Network & system demonstrations” work leader. E4 will formalize the set of integration and demonstration activities in order to systematically showcase the ability of the devices, network architecture and control, technologies to deliver the goals of system-network scalability, network related energy efficiency, network latency, network throughout, distributed compute task performance. E4 will aim to combine the compute motherboards with the DYNAMOS interface card and optical switch.
The European Processor Initiative (EPI) is a cornerstone of the European initiative towards strategic autonomy in HPC, chip technologies and infrastructure. The project has completed its first triennial phase (2018-2021), delivering cutting-edge technologies for European sovereignty such as the Rhea General-Purpose Processor (GPP). The second phase of EPI will focus on processor technologies based on ARM and RISC-V architectures, to develop a competitive European microprocessor and accelerator including the required technology to integrate and use the resulting products for HPC and other applications.
E4’s role is to design and construct the EPAC Test Chip Daughter Board PCIe, for the RHEA Reference Platform. Once this prototype is ready for development, E4 will continue to oversee its management and administration.
The EU needs to provide new HPC professional skills that attract students and ensure European competitiveness in the sector. Thus, the HPC European Consortium leading Education Activities (HERCULES) aims to develop an innovative European Master programme focusing on high-performance solutions, which will become a model for national and Europe-level educational programmes in HPC. The goal of EUMaster4HPC is bringing together talented students in the HPC ecosystem and increasing their professional opportunities in the industrial and Academic sectors. Students will gain practical experience thanks to internships and exposure to European supercomputing centres.
E4 is an industrial Partner of European Technology Platform for HPC (ETP4HPC). Together with Leonardo, E4’s role is to connect the Consortium to the industrial ecosystem by gathering skills and expertise, and support students with an interesting and formative internship opportunity at its headquarters.
EUPEX’s objective is to develop the first European HPC platform, collecting and integrating European technologies for system architecture, processing, software, development tools and applications. The EUPEX platform will be open, scalable, and flexible. EUPEX aims to support the lively emerging European entrepreneurial ecosystem of HPC technology, addressing the related sectors of Artificial Intelligence and Big Data Analytics. It will be a vehicle to prepare communities working in the fields of HPC, AI and Big Data for the upcoming European Exascale systems and federated HPC infrastructure.
E4’s role is to contribute to the design, building and validation of the GPU blade, the construction of the GPP/GPU cluster and the co-design of the second-generation EPI processors.
Computational fluid dynamics (CFD) has become a mature technology in engineering design, contributing to industrial competitiveness and sustainability across a wide range of sectors (e.g., transport, energy production and disaster prevention). Its future growth depends predominantly on the exploitation of parallel HPC architecture; however, this is currently hampered by performance scaling bottlenecks. The ambitious EXAFOAM project seeks to overcome these challenges with the development and validation of a range of algorithmic enhancements. These enhancements will be developed along the entire CFD process chain (pre-processing, simulation, I/O, post-processing).
E4’s role is to validate the performance micro-benchmarks of homogenous and heterogenous architectures. In addition, E4 will analyse the capabilities and modelling of industrial use cases of relevant architectures.
The main goal of the ISOLDE project is to contribute to the unification and focus of an ecosystem for RISC-V open-source architecture, especially in embedded HPC, and to create a breakthrough design capacity in the EU microelectronics industry. This objective will be achieved thanks to the implementation of high-performance RISC-V processing systems and platforms by the end of the project, demonstrated for key European application domains (automotive, space and IoT). Industrial grade open-source support for development, maintenance and verification will be provided and hosted on physically located European servers to address the requirements for European digital sovereignty supported by the ISOLDE project.
E4’s role is to coordinate the Work Package 1 on requirements and specifications, as well as contribute to the implementation and testing of the Space demonstrator.
Today, the digital revolution is having a dramatic impact on both the pharmaceutical industry and the entire healthcare system. The implementation of machine learning, large scale simulations and big data analytics in the drug design and development process offers an excellent opportunity to lower the risk of investment and reduce time to patent and time to patient. LIGATE will support Europe in keeping worldwide leadership in CADD (Computer-Aided Drug Design) solutions, leveraging today’s high-end supercomputers and the exascale resources of tomorrow, while promoting European competition in this field. The project will improve CADD technology on the drug discovery platform EXSCALATE.
E4’s role is to collect requirements and specifications from different stakeholders, HPC companies and centres, for the evolution of HPC systems and EuroHPC infrastructures. Other roles include defining the configuration and integration plan for the Exascale CADD platform; expanding the applications (e.g., Gromacs, Ligen) to address GPU clusters; improving energy efficiency using more accurate measurements and cluster-level energy modelling.
The MaX Centre of Excellence will clear the way for the transition to exascale technologies and beyond, making use of open-source community codes that are both highly successful and widely used in quantum simulations of exascale materials, adopting a sustainable software development strategy to face the sudden technological interruptions projected in the coming years.
E4’s role is to create a network of potential code users, gaining visibility in the materials science community, learning modern techniques for code optimization, and collecting detailed information on the capabilities of code on several platforms. It will also contribute to the co-design of European HPC technologies, to energy efficiency evaluation and tuning, and to the the exploitation of advanced hardware.
Machine learning can help improve weather modelling in the face of the climate change threat. MAELSTROM project originated from the vision of improving European computer architecture in order to assess future impacts on the climate. Specifically, it will propose projects for the construction of computer systems with practical capabilities and optimal energy efficiency. Additionally, it will propose software frameworks to optimise the usability and efficiency of machine learning training on a large scale, and for large scale machine learning applications configured for the meteorological and climate sciences.
E4’s role is to provide around twenty different hardware configurations (including accelerated platforms) for the development and testing of machine learning tools, as well as provide access to different architectures and storage technologies, whose configuration will be co-designed.
REGALE seeks to pave the way of next-generation HPC applications to exascale systems. To this aim, the project will define an open architecture, build a prototype system, and incorporate in this system an increased sophistication level, to equip supercomputing systems with the mechanisms and policies for effective resource utilisation and execution of complex applications. REGALE brings together leading supercomputing stakeholders, prestigious academics, top European supercomputing centres and end users from critical target sectors, covering the entire value chain in system software and applications for extreme scale technologies.
E4’s role is to contribute to requirements collection and co-designing of small-scale prototypes for the development and testing of applications. The two systems will be used also as small-scale evaluation platforms. E4 will also embed a pulp-controller into the REGALE prototype for the management of consumables, in collaboration with the University of Bologna.
The main specific objective of SPACE is to enable 8 among the most widely used European HPC codes in the Astrophysics and Cosmology (A&C) sector, in order to enable the exploitation of pre-exascale systems and prepare them for the transition to exascale and beyond. The related data processing and visualization applications and workflow will be advanced, based on innovative solutions relying on in-situ or in-transit technologies, together with the adoption of ML based solutions. In this way, it will be possible to overcome the difficulties related to storage, access and processing of large data volumes.
E4’s role is to collect feedback from code developers of space codes and work on better performance and scalability of the codes. Besides, it will also support in providing an advanced prototype for the archive and a unified point of access/deployment for all code/data and automation needed by the Partners to automatically build and test new versions and compare performances.
To achieve high performance and high energy efficiency on near-future exascale computing systems, a technology gap needs to be bridged. TEXTAROSSA aims at tackling this gap by applying a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of IPs, programming models and tools derived from European research projects, led by its Partners. The technologies developed by the project will be tested on the Integrated Development Vehicles (IDV), mirroring and extending the European Processor Initiative ARM64-based architecture, and on an OpenSequana testbed. To drive the technology development and assess the impact of the proposed innovations, TEXTAROSSA will use a representative number of HPC, HPDA and AI demonstrators, covering challenging HPC domains.
E4’s role is to develop a heterogeneous IDV based on the ARM platform and accelerators. Furthermore, E4 will define the specification of the computing element in terms of processor, memory hierarchies and integrated IPS.
TRISTAN’S aim is to expand, mature and industrialize the European RISC-V ecosystem so that it can compete with existing commercial/proprietary alternatives. This will be achieved by leveraging the Open-Source community to define a European strategy for RISC-V based designs including the creation of a repository of industrial quality building blocks to be used for SoC designs in different application domains (e.g., automotive, industrial, etc.). The TRISTAN approach is holistic, covering both electronic design automation tools (EDA) and the full software stack. This ecosystem will ensure a European sovereign alternative to existing commercial/proprietary players.
E4’s role is to develop a demonstrator based on commercial FPGA and a test chip, featuring a small footprint RISC-V and including system software. The test chip is built using the TRISTAN EDA methods. E4 plans to industrialize and make available as a standard product a follow-on version of the Industrial Prototype developed in the project.